Madhavi - Computer science tutor - Hyderabad
Madhavi - Computer science tutor - Hyderabad

Madhavi's profile, qualifications and contact details have been verified by our experts

Madhavi

  • Rate S$15
  • Response 12h
  • Students

    Number of students accompanied by Madhavi since their arrival at Superprof

    44

    Number of students accompanied by Madhavi since their arrival at Superprof

Madhavi - Computer science tutor - Hyderabad

S$15/h

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  • Computer Science
  • IT security

ASIC design verification based CPU, NoC, Security and IoT. Verification for Memory Controller, Router, Audio Controller, MMU, USB, DDR, GPIO. AXI, AHB, APB, OCP, UART, SPI, I2C.

  • Computer Science
  • IT security

Lesson location

About Madhavi

Frontend ASIC Functional Verification.
Skillset Summary:
Worked on SoC Verification for Power Management, x86/arm based CPU, NoC, Security and IoT.
Worked on IP Verification for Memory Controller, Router, Audio Controller, MMU, USB, DDR, GPIO.
Worked on Bus Protocols for AXI, AHB, APB, OCP, UART, SPI, I2C.
Good Knowledge on System Verilog, Verilog, C/C++, Assembly language, PERL, TCL.
Worked on Verification Methodology - UVM and OVM.
Good knowledge on UPF flow and GLS verification.
Good knowledge on EDA tools - Simvision, Verdi, Questasim, VCS, NCSim, Vmanager.

See more

About the lesson

  • Primary
  • Secondary
  • SPM
  • +13
  • levels :

    Primary

    Secondary

    SPM

    Form 6

    STPM

    Adult education

    Bachelor

    Masters

    Diploma

    Doctorate

    Other

    Beginner

    Intermediate

    Advanced

    Professional

    Kids

  • English

All languages in which the lesson is available :

English

Frontend ASIC Functional Verification.
Skillset Summary:
Worked on SoC Verification for Power Management, x86/arm based CPU, NoC, Security and IoT.
Worked on IP Verification for Memory Controller, Router, Audio Controller, MMU, USB, DDR, GPIO.
Worked on Bus Protocols for AXI, AHB, APB, OCP, UART, SPI, I2C.
Good Knowledge on System Verilog, Verilog, C/C++, Assembly language, PERL, TCL.
Worked on Verification Methodology - UVM and OVM.
Good knowledge on UPF flow and GLS verification.
Good knowledge on EDA tools - Simvision, Verdi, Questasim, VCS, NCSim, Vmanager.

See more

Rates

Rate

  • S$15

Pack rates

  • 5h: S$75
  • 10h: S$150

online

  • S$15/h

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